Speaker
Description
Caribou is a versatile data acquisition system used in multiple collaborative frame-works (CERN EP R&D, RD50/DRD3, AIDAinnova) for both bench-top and test-beam qualification of novel silicon pixel detector prototypes. The system is built around a common hardware, firmware and software base shared across different projects, thereby drastically reducing the development effort and cost. The current version consists of a custom Control and Readout (CaR) board and a commercial Xilinx Zynq 7000 series System-on-Chip (SoC) platform. The CaR board provides a hardware environment featuring various services such as powering, slow-control and high-speed data links that can be used by the target detector prototype. The SoC platform is based on a ZC706 evaluation board running a fully featured Yocto-based Linux distribution (Poky) and a custom data acquisition software (Peary).
Migration to a Zynq UltraScale+ architecture is ongoing and a new hardware version is under development which aims to replace the evaluation board with a commercial System-on-Module (SoM) and combine the CaR board and SoM into a fully integrated hardware platform, while also adding new features and improving the capabilities of the system. This talk describes the current Caribou system architecture, its capabilities, examples of projects where it is used, and the foreseen system upgrade.
