Speaker
Description
Hybrid pixel detector readout continues to permit maximum flexibility when addressing the need for precise time tagging in high-rate environments as the detector topology and readout circuitry can be optimised independently for maximum performance. By setting the detection threshold well above the noise floor, noise hit free readout is possible and this, in turn, allows for trigger-free data-driven operation strongly widening the scope of operation both in the high energy physics environment and elsewhere. The Timepix4 ASIC can provide on-pixel time stamping to within a bin of 200ps while the LA-Picopix aims for a bin size of 40-50ps. However, as the Timepix4 device demonstrates, data-driven readout can lead to challenges with off-chip bandwidth. The LA-Picopix ASIC contains new features which can help by rejecting large clusters which can dominate readout bandwidth needlessly in some cases. This contribution will describe the Timepix4 architecture and show a few examples of applications both within and beyond HEP. It will also describe the status of the LA-Picopix design. Recent progress in reducing the cost of flip chip and Through Silicon Via processing will also be described.
